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| INTEGRATED CIRCUITS DATA SHEET For a complete data sheet, please also download: * The IC04 LOCMOS HE4000B Logic Family Specifications HEF, HEC * The IC04 LOCMOS HE4000B Logic Package Outlines/Information HEF, HEC HEF4502B buffers Strobed hex inverter/buffer Product specification File under Integrated Circuits, IC04 January 1995 Philips Semiconductors Product specification Strobed hex inverter/buffer DESCRIPTION The HEF4502B consists of six inverter/buffers with 3-state outputs. When the output enable input (EO) is HIGH all six outputs (O1 to O6) are in the high impedance OFF-state. When the enable input (E) is HIGH all six outputs are switched to LOW. The outputs have a 2-TTL load drive capability. HEF4502B buffers Fig.2 Pinning diagram. HEF4502BP(N): HEF4502BD(F): HEF4502BT(D): 16-lead DIL; plastic (SOT38-1) 16-lead DIL; ceramic (cerdip) (SOT74) 16-lead SO; plastic (SOT109-1) ( ): Package Designator North America PINNING D1 to D6 E EO O1 to O6 data inputs enable input output enable input 3-state outputs Fig.1 Functional diagram. TRUTH TABLE INPUTS Dn L H X X Notes 1. H = HIGH state (the more pos. voltage) L = LOW state (the less pos. voltage) X = state is immaterial Z = high impedance off state January 1995 2 E L L H X EO L L L H OUTPUT On H L L Z FAMILY DATA, IDD LIMITS category BUFFERS See Family Specifications Fig.3 Logic diagram. Philips Semiconductors Product specification Strobed hex inverter/buffer DC CHARACTERISTICS VSS = 0 V Tamb (C) VDD V Output current HIGH Output current HIGH Output current LOW 5 4,75 10 15 2,5 0,4 0,5 1,5 IOL -IOH 3,8 3,5 12,0 24,0 3,2 2,9 10,0 20,0 5 10 15 VOH V 4,6 9,5 13,5 -IOH VOL V SYMBOL MIN. 1,2 3,8 12,0 -40 MAX. MIN. 1,0 3,2 10,0 + 25 MAX. HEF4502B buffers + 85 MIN. 0,8 2,5 8,0 2,5 2,3 8,0 16,0 MAX. mA mA mA mA mA mA mA AC CHARACTERISTICS VSS = 0 V; Tamb = 25 C; input transition times 20 ns VDD V Dynamic power dissipation per package (P) 5 10 15 TYPICAL FORMULA FOR P (W) 5 000 fi + (foCL) x VDD2 25 000 fi + (foCL) x VDD2 85 000 fi + (foCL) x VDD2 where fi = input freq. (MHz) fo = output freq. (MHz) CL = load capacitance (pF) (foCL) = sum of outputs VDD = supply voltage (V) January 1995 3 Philips Semiconductors Product specification Strobed hex inverter/buffer AC CHARACTERISTICS VSS = 0 V; Tamb = 25 C; CL = 50 pF; input transition times 20 ns VDD V Propagation delays Dn, E On HIGH to LOW 5 10 15 5 LOW to HIGH Output transition times HIGH to LOW 10 15 5 10 15 5 LOW to HIGH 3-state propagation delays Output disable times EO On HIGH 5 10 15 5 LOW Output enable times EO On HIGH 5 10 15 5 LOW 10 15 tPZL tPZH 60 35 30 55 25 20 120 ns 70 ns 60 ns 110 ns 50 ns 40 ns 10 15 tPLZ tPHZ 60 55 55 50 35 30 160 ns 140 ns 140 ns 100 ns 70 ns 60 ns 10 15 tTLH tTHL tPLH tPHL 85 40 35 80 35 30 25 12 8 30 15 12 170 ns 80 ns 70 ns 160 ns 70 ns 60 ns 50 ns 24 ns 15 ns 60 ns 30 ns 24 ns SYMBOL TYP. MAX. HEF4502B buffers TYPICAL EXTRAPOLATION FORMULA 77 ns + (0,17 ns/pF) CL 37 ns + (0,06 ns/pF) CL 33 ns + (0,04 ns/pF) CL 66 ns + (0,28 ns/pF) CL 28 ns + (0,13 ns/pF) CL 25 ns + (0,10 ns/pF) CL 10 ns + (0,30 ns/pF) CL 7 ns + (0,11 ns/pF) CL 5 ns + (0,07 ns/pF) CL 5 ns + (0,50 ns/pF) CL 3 ns + (0,24 ns/pF) CL 3 ns + (0,18 ns/pF) CL January 1995 4 |
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